At its financial analyst day on June 9th, AMD rolled out new product roadmaps including roadmaps for the newly integrated companies Xilinx and Pensando. The message was that AMD is ready for a new era of hyper growth and scaling. As CFO Devinder Kumar said in closing his remarks, AMD has never been in such an outstanding financial position and the product roadmaps “are the best we’ve ever had.” The company achieved a 56% Compound Annual Growth Rate (CAGR) over the last two years. The company is emphasizing growth in data center and cloud computing as it hopes to improve company margins and product revenue diversification.
The Data Center and Embedded reporting segment at AMD has a 95% CAGR and is now 25% of overall revenue. AMD’s goal is to grow that business to 50% of revenue and estimates the data center market is a $125B Total Addressable Market (TAM). While AMD still thinks that it is “still underrepresented” in the PC market, the company’s general focus is to deliver differentiated products in key segments of the market, such as gaming. The prospects for the overall PC business are likely soft for 2022 as it had raced ahead of the historic trends during the pandemic years of 2020 and 2021.
This year, 2022, is a major inflection point for the company. AMD finalized the most important acquisition for the company since AMD bought ATI Technologies back in 2006. The recent acquisition of Xilinx brings a lot of technology and will be transformative for AMD. Xilinx adds a diversified portfolio of customers and markets, expanding AMD’s TAM by $135B. The synergies between the two companies are especially important in AI and datacenter. Xilinx will also further AMD’s exposure to automotive, 5G infrastructure, and general embedded systems. The Pensando acquisition gets AMD into the Data Processing Unit (DPU) market for networking and enhances AMD’s system expertise putting it on a more even footing with Intel and Nvidia.
Going forward, AMD is preparing for a new generation of products and has added the capability to focus on workload optimizations for markets such as cloud and High-Performance Computing (HPC). While AMD has been heavily focused on power optimizations and providing more compute per socket and for less cost, the company trailed competitors in AI processing. This is where Xilinx’s AI Engines (AIEs) come into play. AMD will be able to sprinkle the AIEs into its products for pervasive AI in PCs and the data center. Even without expensive external accelerators like GPUs, the CPU plays a critical role in AI inference, gathering actionable insight and value from data because it is being processed closer to the data, which reduces latency. IBM has demonstrated this in its new Telum Z-series mainframe computers which has built-in AI inference acceleration.
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Xilinx also adds a fair amount of software development to AMD. In total, AMD now has around 5,000 software engineers (almost one quarter of the company’s employees). The next step is to combine its various software stacks (VITIS, ROCm, ZenDNN) into a coherent developer platform called AMD Unified Software Stack.
As part of this new AMD expansion, it is building a new branding campaign under the banner “Together We Advance_.” The trailing underscore is there on purpose, leaving space to add specific examples and markets. For dynamic media, the underscore blinks like an old-school cursor indicating that the phrase is unfinished.
To paraphrase the movie The Graduate, the “one word” (of advice) AMD would use: “chiplets.” Chiplets are Integrated Circuits (ICs) designed for specific functions and then combined with other chiplets in a single package through an interposer to form a larger IC. AMD is deeply committed to chiplets for its compute products, including building custom chiplets. AMD is also open to the use of 3rd party chiplets, but how AMD will integrate those chiplets into its Infinity Fabric chiplet interconnect remains to be seen. An upcoming 4th generation of the Infinity Architecture is said to be extensible to CXL 3 and UCIe.
With chiplets, AMD has the flexibility to build heterogeneous integration devices. And as it focuses on cloud workloads, AMD has a new CPU core optimized for building cloud-centric processors. The forthcoming Zen 4c (compact) core is functionally identical to a regular Zen 4 core, but some performance has been sacrificed to shrink the size of the core to allow for more cores per chip. This will help AMD compete with Arm-based server chips, like those from Ampere, and those designed by the cloud companies themselves, like Amazon’s Graviton.
The Zen 4 and 4c cores will be built in TSMC’s 5nm process. The Zen 4 CPU will come to desktop processors first, which are covered below. From Zen 4 AMD expects an 8-10% improvement in instructions per cycle (IPC) performance, but a more sizeable 25% improvement in performance per Watt. The “Genoa” server processor, based on the Zen 4 core, is expected to ship in Q4 of this year with PCIe Gen 5, 12 channels of DDR5 memory, and have up to 96 cores. For confidential compute, it will support in-line memory encryption.
The Zen 4c cloud native processor is code-named Bergamo. It will have up to 128 CPU cores, with up to 256 threads.
Next on the roadmap is the Zen 5 CPU where AMD is hedging its process bet. Both 4nm and 3nm versions are planned. There will also be a Zen 5c version. The Zen 5 will be a refresh of the CPU microarchitecture with a new front end and wider-issue core. To support the faster execution, AMD also plans to increase memory bandwidth.
The overall goal is for AMD’s chips to be easily tailored for workloads. Workload diversity requires optimized silicon for maximum efficiency. Bergamo is one such optimization example. In 2023, AMD is also planning to ship a Genoa-X CPU with up to 1GB of L3 cache per socket, great for HPC workloads and database processing. The company also revealed a smaller, lower power “Siena” CPU with 64 Zen 4 cores. The target market for Sienna is lower cost and smaller servers used in storage and telecom.
The focus for AMD graphics is efficiency: performance per watt and performance per silicon area. In general, the RDNA3 GPU architecture implemented in 5nm should have a 50% perf/watt improvement compared with its predecessor. And now AMD is indicating it will use chiplets to scale its graphics and GPU compute products without the excessive cost and yield issues massive die sizes create. On the consumer graphics front, the Navi 3 GPU will use 5nm chiplets and will be released later this year.
To meet AMD’s commitment to the Frontier Exascale supercomputer, the performance of the GPU compute architecture in the Instinct MI 200 delivers four times higher 64-bit floating point (FP64). It also delivers better mixed-precision performance on HPL and HPL-AI benchmarks. AMD is also supporting a proposed 8-bit floating-point standard to use in AI training and inference that has been proposed by Graphcore. This format can deliver 8x more AI performance, which competes favorably with how Nvidia is using reduced precision floating-point math in its Hopper GPU.
AMD’s open-source ROCm software will scale from single node to supercomputers. ROCm 4 will focus on HPC and Exascale workloads and then ROCm 5 will expand capability to AI workloads – both training and inference. AMD is still behind Nvidia with respect to AI software, but with the addition of Xilinx and other partnerships, such as Microsoft Azure, the company hopes to catch up. According to AMD, the CDNA 3 architecture should have five times the AI performance/W.
After AMD financial analyst day, it was revealed that the AMD Instinct MI300 product with 3D stacking to combine AMD CDNA3 GPUs, Zen 4 CPUs, cache memory and High Bandwidth Memory chiplets all in one package will be used to hit the 2 exaFLOPS performance target for the El Capitan Exascale supercomputer for Lawrence Livermore National Laboratory’s (LLNL). The MI300 should ship in 2023.
While the PC market may be slowing, the competition with Intel is not. AMD has moved upmarket to address commercial, gaming, and premium segment PCs. To further this move, the company’s next generation of Ryzen processors will add AIE AI acceleration, heterogeneous packaging, and extreme power management.
The next new “Phoenix Point” 4nm Zen 4 notebook system-on-chip (SoC) processor (which AMD still calls an APU) will have RDNA3 graphics and will bring the AIE accelerator to PCs. It’s followed by the “Strix Point” processor with Zen 5 CPUs, RDNA 3+ graphics and AIE. AMD hedged on the process node for Strix Point.
For desktops, the 5nm Ryzen 7000 CPU will require a new socket to support DDR5 memory and PCIe Gen 5. After that comes Zen 5-based “Granite Ridge” in an “advanced node” in 2024. AMD has not shown any interest in mixing regular Zen cores with the compact variants to build a big-little processor like Intel did in Alder Lake and like most Arm vendors do in smartphones and tablets.
The New Adaptive, Embedded, and Networking Products
The former CEO of Xilinx, Victor Peng, is now in charge of AMD’s adaptive and embedded businesses and has been given the additional assignment to advance AMD’s AI strategy. The embedded business now includes AMD’s embedded Ryzen processors in addition to the Xilinx portfolio. The markets this group will address include data center, edge, and endpoints. Xilinx portfolio is already popular in communications, with many design wins in 5G base stations where its products provide the necessary bandwidth, low latency, and flexibility. In automotive, the Xilinx products can address autonomous control and sensing, internal safety, and comfort.
The adaptive product line will continue to roll out 7nm variations until the roadmap jumps to 3nm for next-gen SoC in 2025.
The Xilinx and Pensando networking products will co-exist for now. Pensando’s Solarflare SmartNIC has low latency, while the Xilinx Alveo can be customized by hyperscalers. These DPUs are popular for cloud vendors today, but enterprise users will get additional support with VMWare’s forthcoming Project Monterey, a new virtual infrastructure that leverages DPUs.
AMD unveiled a broad set of roadmaps, laying out its plans through 2024. Based on its previous record on execution, we have every reason to believe in the company’s ability to hit those targets. The only thing that could derail 2024 is if TSMC has trouble ramping the 3nm process node, which is not likely. TSMC’s 3nm node will continue to use FinFET transistor design while competitor Samsung has already announced that it’s in production with a gate-all-around technology called Multi Bridge Channel FET (MBCFET), a nanosheet-based implementation, in its 3nm node. AMD could move to Samsung’s foundry service if the MBCFET proves to be the superior technology. This is an obvious benefit of the fabless strategy that AMD adopted many years ago.
Overall, the new AMD continues to be a tough competitor for Intel, as that company tries to get its businesses back on track under new CEO Pat Gelsinger.
Tirias Research tracks and consults for companies throughout the electronics ecosystem from semiconductors to systems and sensors to the cloud. Members of the Tirias Research team have consulted for AMD, Intel, Nvidia, and other companies throughout the Ai and PC ecosystems.