Intel Editorial: Intel Advanced Architecture for Data Centers, HPC-AI, Client Computing –

Santa Clara, CA-(Business wire)-The following is an editorial commentary by Raja Koduri, Senior Vice President and General Manager of Accelerated Computing Systems and Graphics Group at Intel Corporation.

Architecture is the alchemy of hardware and software. Blending the best transistors for a particular engine, connecting them through advanced packaging, integrating high bandwidth, low power caches, high capacity, high bandwidth memory, and for hybrid computing clusters Features low-latency, scalable interconnects. At the same time as packaging, we also guarantee that all software will be seamlessly accelerated. Intel architects are looking forward to disclosing the architectural innovations they have been working on for their imminent products. Every year At Intel Architecture Day, this year’s event (third) was the most exciting ever.

Today, we are announcing the biggest changes in Intel® architecture across generations. This includes Alder Lake’s first in-depth study, the first performance hybrid architecture with two new generation x86 cores and an intelligent Intel® ThreadDirector workload scheduler. Sapphire Rapids is Intel’s new standard configuration data center architecture with a new performance core and various accelerator engines. New discrete game graphics processing unit (GPU) architecture. New Infrastructure Processing Unit (IPU). Ponte Vecchio, the Tour Deforce data center GPU architecture with the highest computational density in Intel’s history.

These architectural breakthroughs, starting with Alder Lake, have prepared the next era of leadership products. And the breakthrough today is how architectures are overwhelmingly demanding better computing performance as desktop-to-data center workloads grow, become more complex, and diversify. Indicates how to meet.

more: Intel Architecture Day 2021 (Press kit) | Expanding Intel Foundry Partnerships: An Important Part of IDM 2.0 (Stuart Pan Editorial) | Intel announces the largest architectural shift of its generation for CPUs, GPUs and IPUs (Architectural fact sheet)

Our architects are working hard to combine Intel’s rich scalar, vector, matrix, and spatial computing engines to create a hybrid computing architecture that provides non-linear gains for your most demanding workloads. Is working on.

You need to visit us Newsroom press kit To see the presentation, but I let you explain the highlights:

Efficient core: A highly scalable x86 microarchitecture to meet the computing requirements of a wide range of customer needs, from low-power mobile applications to manycore microservices. Compared to Intel’s most prolific CPU microarchitecture, Skylake, Efficient-core offers 40% more single-threaded performance at the same power, or the same performance while consuming less than 40%.1 In terms of throughput performance, four Efficient-cores provide 80% higher performance and consume less power than two Skylake cores running four threads, or 80% less power with the same throughput performance. ..1

Performance core: This x86 core is not only the best performing CPU core Intel has ever built, but also provides step functions for CPU architecture performance to drive computing for the next decade. .. Designed as a wider, deeper, smarter architecture, it exposes more parallelism, increases parallelism of execution, reduces latency, and improves general-purpose performance. It also helps support large data and large code footprint applications. Performance-core offers approximately 19% geometric mean improvement over a wide range of workloads at the same frequency as the current 11th generation Intel® Core ™ architecture (Cypress Cove core).1

Performance-core targets the evolving trends in data center processors and machine learning, offering dedicated hardware, including Intel’s new Advanced Matrix Extensions (AMX), to perform matrix multiplication operations with single-digit performance. increase. This is about an eight-fold increase in artificial intelligence. acceleration.1 It leverages the x86 programming model and is designed for software usability.

Intel Thread Director: Intel’s unique scheduling approach was developed to seamlessly integrate efficient and performance cores, dynamically and intelligently allocate workloads from the beginning, optimize systems and maximize real-world performance and efficiency. I did. Because intelligence is built directly into the core, Intel Thread Director works seamlessly with the operating system to place the right threads in the right core at the right time.

Alder Lake: Reinventing the multi-core architecture, Alder Lake is Intel’s first performance hybrid architecture with the new Intel Thread Director. This is Intel’s most intelligent client system-on-chip (SoC) architecture, featuring an efficient core and performance core combination for ultra-mobile to desktop scaling and several industry-leading I. Lead the industry transition with / O and memory. .. Products based on Alder Lake will begin shipping this year.

NSe HPG and Alchemist SoC: The new discrete graphics microarchitecture is designed to scale for enthusiast-class performance in gaming and creation workloads. Xe HPG microarchitecture features new Xe-Core, compute-focused, programmable and scalable elements, and full support for DirectX 12 Ultimate. New matrix engine in Xe-Core (called X)e Matrix eXtensions (XMX) accelerates artificial intelligence workloads such as XeSS is a new upscaling technology that enables high performance and high fidelity games. NSe HPG-based Alchemist SoC (formerly codenamed DG2) will be new in the first quarter of 2022 Intel® Arc ™ brand..

Sapphire Rapids: Combining Intel’s Performance Core with the new Accelerator Engine, Sapphire Rapids sets the standard for next-generation data center processors. At the heart of Sapphire Rapids is a tiled modular SoC architecture, which, thanks to Intel’s EMIB multi-die interconnect packaging technology and advanced mesh architecture, offers significant scalability while retaining the benefits of a monolithic CPU interface. It will be realized.

Infrastructure processing unit: Mount Evans is Intel’s first dedicated ASIC-based IPU, along with Oak Springs Canyon, the new FPGA-based IPU reference platform. The Intel IPU-based architecture allows cloud service providers (CSPs) to maximize data center revenue by offloading infrastructure tasks from the CPU to the IPU. Offloading infrastructure tasks to the IPU allows the CSP to rent 100% of the server CPU to the customer.

NSe HPC, Ponte Vecchio: The most complex SoC Intel has ever built, IDM 2.0 Strategy Ponte Vecchio leverages several advanced semiconductor processes, innovative EMIB technology, and Foveros 3D packaging. This product enables the Moonshot project, an industry-leading FLOP and computational density 100 billion transistor device that accelerates artificial intelligence, high-performance computing, and advanced analytical workloads. At Architecture Day, we showed that early Ponte Vecchio Silicon was already demonstrating leadership performance and set industry records in both inference and training throughput with popular AI benchmarks.1 Our A0 silicon already offers 45 TFLOPS FP32 throughput, 5 TBps memory fabric bandwidth, and 2 TBps connection bandwidth.Ponte Vecchio, just like us NSe The architecture is enabled by oneAPI, an open, standards-based cross-architecture and cross-vendor integrated software stack.

Looking back on last year, technology was central to the way we all communicate, work, play and deal with through a pandemic. Huge computing power has proved important. In the future, we are facing huge demand for computing. By 2025, there could be 1,000 times more demand. It is Moore’s Law 5th power that increases 1,000 times in four years.

Architect Pat Gelsinger, as CEO, said on Architecture Day:We face difficult computing challenges that can only be solved by innovative architectures and platforms … Our talented architects and engineers have enabled the magic of all this technology. ”

The world expects architects and engineers to solve the most difficult computational problems and enrich people’s lives. Our strategy and implementation are accelerating at a blazing pace to meet these demands.

About Intel

Intel (Nasdaq: INTC) is an industry leader, creating world-changing technologies that enable global progress and enrich our lives. Inspired by Moore’s Law, we continue to design and manufacture semiconductors to meet our customers’ biggest challenges. Incorporate intelligence into the cloud, networks, edges, and computing devices of all kinds to unlock the potential of data and transform your business and society for the better. For more information on Intel innovation, please visit: When

1 For workloads and configurations, visit the following websites:

The statements in this document that refer to future plans or expectations are forward-looking statements. These statements are based on current expectations and carry many risks and uncertainties that may cause actual results to differ materially from those expressed or implied in such statements. See the latest earnings announcements and SEC filings for more information on factors that can cause significant differences in actual results.

The codename is used by Intel to identify products, technologies, or services that are under development and are not publicly available. These are not “commercial” names and are not intended to act as trademarks.

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed to be the property of others.

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